The progress of electronic devices represented by semiconductor devices is dramatic, the requirements for constituent components and elements are becoming more and more advanced. In this background, capacitor elements functioning as passive elements are intensively studied to have higher degree of integration and larger capacity.
In the technology for enhancing the degree of integration and capacity of capacitor elements, instead of the hitherto used dielectric film materials such as Si3N4 or plasma SiN, it is proposed to use materials of high dielectric constant, such as Ta2O5 (Tantalum Pentoxide) and other transition metal oxides. The configuration of the capacitor element has been changed from the MIS (Metal Insulator Silicon) capacitor to the MIM (Metal Insulator Metal) capacitor.
The lower electrode and upper electrode of the MIM type capacitor are formed by sputtering method, vapor deposition method, MOCVD method, etc. Dielectric films of materials of high dielectric constant represented by transition metal oxides are formed by (1) low pressure heat CVD (Chemical vapor Deposition) method, (2) sputtering method or vapor deposition method, and (3) plasma CVD method, etc.
These forming methods of dielectric films differ depending on the performance and uses of capacitor elements, and the lower electrode material (Metal Material) and its forming method may be selected as follows depending on the forming method of the dielectric film.
(1) In the case of a dielectric film formed by low pressure heat CVD method, when the dielectric film and the lower electrode layer contact with each other at high temperature, a problem of deterioration (Oxygen Deficiency, etc.) of the quality of the dielectric film may occur at the interface due to reactive oxygen gas when forming the dielectric film or reaction between the oxygen contained in the dielectric film and the lower electrode layer. To avoid this problem, as a barrier layer between the lower electrode layer and dielectric film, it is attempted to laminate a metal of high boiling point of nitride or oxide relatively hard to react, such as TiN, TiO, WN, WO, TaN, and TaO.
Recently, at the interface contacting with the dielectric film when forming the dielectric film, a platinum group metal (Ru, Rh, Pd, Os, Ir) not forming oxide, represented by Au, Ag, and Pt (platinum), is used as the lower electrode.
Or if oxides are slightly formed, such oxides are used as a conductive material, and an oxide material of platinum group metal (Ru, Rh, Pd, Os, Ir) represented by Pt (platinum) is used as a barrier layer between the lower electrode layer and dielectric film. The barrier layer may be used as part of the electrode layer.
(2) In the case of the dielectric film formed by sputtering method or vapor deposition method, satisfactory film is not obtained, and high temperature heat treatment by RTO (rapid thermal oxidation) is needed after forming the film, and hence the material of the lower electrode mentioned above is used.
(3) In the case of the dielectric film formed by plasma CVD method, the film can be formed at low temperature and a film of a relatively favorable quality is obtained, and high temperature heat treatment is not necessary, and reaction hardly occurs at the interface contacting with the dielectric film when forming the dielectric film.
Hence, as the lower electrode material, low melting point metal materials are used such as AlSi, AlSiCu, and AlCu, or as the barrier layer between the lower electrode layer and dielectric film, a high melting point metal material is laminated on the low melting point metal material.
By such combination of lower electrode material and dielectric film material, it is possible to form a dielectric film of high quality not forming reaction layer at the interface contacting with the lower electrode and dielectric film.
However, there is a common problem regardless of the manufacturing methods of MIM type capacitor elements. When the metal material used in the lower electrode or upper electrode of the MIM type capacitor element used in a semiconductor device is formed by sputtering method, vapor deposition method, or MOCVD method, the obtained film is generally composed of a polycrystalline structure. The surface is considerably undulated. That is, there are recesses and bumps represented by crystal grains or hillocks at the interface contacting with the lower electrode layer and dielectric film.
Depending on the metal materials, the shape and size of surface undulations (Crystal Shapes) are different. This is explained as follows.
Supposing the melting point to be Tm (°C.), recrystallization temperature to be Tr (up to ⅓ Tm), and surface self-diffusion temperature to be Tsd (up to 1/10 Tm), the relations between the film structure and substrate temperature T when forming the lower electrode shows the following tendency.Tm>T>Tr  (1)
Since T is the recrystallization temperature Tr or more, crystal grains grow to form large crystal grains like a stone hedge.Tr>T>Tsd  (2)
Since T is the recrystallization temperature Tr or less, growth of crystal grains is suppressed, but since it is the surface diffusion temperature Tsd or more, the film is formed in crystals long in the vertical direction, that is, columnar crystal grains.T<Tsd  (3)
Since T is lower than the surface diffusion temperature Tsd, growth of crystal grain boundary is insufficient, and the film is acicular.
For example, in the high melting point material of TiN, the recrystallization temperature is about 1000° C., and when a film is formed at substrate temperature of about 300 to 500° C., every crystal grain is formed like a fine columnar crystal grain shape, and rugged undulations are formed on the surface (see FIG. 20).
In the case of low melting point material Al, the recrystallization temperature is about 150° C., and when a film is formed at substrate temperature of about 200 to 300° C., crystal grains are formed like a stone hedge, and undulations are also formed on the surface (see FIG. 21). In addition, when TiN is used as the barrier layer to the dielectric film, a laminated structure with the lower electrode layer is formed, and hence the undulations are further emphasized (see FIG. 22).
Besides, depending on the film forming condition or stress at the time of forming the lower electrode layer, hillocks are formed, and surface undulations are similarly formed although the degree is different depending on the metal materials (not shown).
When the capacitor element composed of the lower electrode layer formed of these metal materials by sputtering, the dielectric layer thereon, and upper electrode layer is made to function, the leak current increases. That is, as shown in FIG. 20, FIG. 21, and FIG. 22, when the dielectric film is formed on the crystal grains of the lower electrode 1, or rugged undulated surface (lower electrode surface) represented by hillocks, the dielectric film 2 is laminated unevenly on the surface of the lower electrode 1 due to the effects of undulations as shown in FIG. 23A and FIG. 24A, the leak current increases due to concentration of an electric field. In particular, in the boundary (crystal grain boundary) of crystal grain 3 and crystal grain 3 on the surface of the lower electrode 1, since the individual crystal grain shapes are different, steep grooves 4 are formed depending on the location, and when the dielectric film 2 is formed on such surface of the lower electrode 1, the dielectric film 2 is deposited unevenly at the crystal grain boundary.
For example, when the lower electrode is made of high melting point metal material of TiN, the dielectric film is made of Ta2O5, and the upper electrode is made of TiN, the leak current characteristic of the capacitor element becomes as shown by curve b in FIG. 19. It is known from FIG. 19 that the capacitor element of such composition evidently has a leak current not withstanding a practical use.
Such conventional capacitor element, more specifically the MIM type capacitor element composed of a film of high dielectric constant involves the following problems.
(1) Surface undulations represented by crystal grain shapes or hillocks of the lower electrode are present, regardless of the manufacturing methods of the MIM type capacitor element, whether the crystal grain shapes are columnar or like a stone hedge as shown in FIG. 23A and FIG. 24A. Due to the effects of surface undulations, the dielectric film 2 is deposited unevenly, and the capacity drops, the leak current increases, the film uniformity deteriorates, and the capacitor element characteristics are extremely lowered. These problems are common when metal materials are used in the lower electrode 1, and in order to deposit the dielectric film 2 uniformly, it is preferred that the interface of the lower electrode 1 contacting with the dielectric film 2 is as flat as possible.
(2) Further, when the capacitor element is incorporated into a semiconductor device, as the dielectric film 1 becomes thinner with the acceleration of higher degree of integration and larger capacity, the dielectric film 2 is more likely to be deposited unevenly due to effects of surface undulations represented by crystal grain shapes or hillocks on the surface of the lower electrode 1 as shown in FIG. 23A to C, and FIG. 24A to C. That is, the capacity drops, the leak current increases, the film uniformity deteriorates, and the capacitor element characteristics are extremely lowered, and therefore the higher degree of integration while maintaining the required characteristics is a common subject regardless of the manufacturing methods of MIM type capacitor elements, and its limit has come to be known at the present.